Correlator Overview

The correlation module is responsible for the X stage of the FX process: cross-multiplying and integrating up to 125,000 antenna pairs for each of 4 polarization products. In order to efficiently utilize the processing power of the FPGAs, the correlator is divided into eight 4 MHz slices to cover the full 32 MHz bandwidth. The data are formatted and dumped at 0.5 s intervals in order to maintain a full FOV. Each correlation module is based upon an 8x8 array of Xilinx Virtex II Pro FPGA's. The rows and columns of the array are driven by high speed (2 Gb/s) data streams, which contain the data for 64 antennas, broken into 8 kHz frequency channels. In turn, each FPGA has an internal 8x8 array of correlator cells, each of which are time-multiplexed to correlate 64 baselines. The time-multiplexing matches the 256 MHz processing speed of the dedicated multipliers in the FPGA to the slower data rate of 4×10 6 complex frequency samples per second. Overall, there are 125,000 baselines correlated within the WFC, producing ~4 billion visibilities every half second.

The array beamformer (in contradistinction to the analog beamformer in the antenna tiles) digitally forms voltage beams for the full array. These beams are linear combinations of the complex voltage samples in each 10 KHz channel. The complex factors that enter as the coefficients of each linear term must include the effects of instrumental gain in the look direction, a frequency-dependent ionospheric phase term, and a geometric phase factor based on look direction and antenna tile position. The various phase factors must be well-enough determined, and specified in both time and frequency, to avoid significant decorrelation (phase error < 10°).

Detailed description of the correlator and the array beamformer can be found here.

SEARCH: